This course provides a description of how computers work by following the abstraction trail from the high-level programming layer down to the digital-logic component layer. By understanding how the features of each abstraction layer are implemented in the one beneath it, one can grasp the tapestry of the software/hardware interface. Topics include programming in assembly language, machine instructions and their encoding formats, translating and loading high-level programs, computer organization and performance issues, CPU structure, single/multi-cycle datapath and control, pipelining, and memory hierarchy. The course presents theoretical concepts as well as concrete implementations on a modern RISC processor. The lab sessions (3 hours/week) involve experiments on assembly and machine language, hardware description languages and simulators, processor architectures, cache memories.

By the end of the course, the students will be expected to be able to:

1. Translate high-level code to assembly language and machine code
2. Represent data in machine readable form and describe how it is stored and manipulated in a CPU
3. Synthesize hardware of increasing complexity from logic gates to a simple CPU using a Hardware Description Language
4. Evaluate computer performance and compare performance on different architectures and designs
5. Describe and critique I/O and Parallel Hardware

• Section A: Mondays and Wednesdays, 5:30pm - 7:00pm, CLH A